SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 388

• Manufacturer Part Number: SAM3N0C
• Manufacturer: Atmel Corporation

26.5
Figure 26-3. I/O Line Control Logic
388
388
PIO_SCDR
Peripheral C Output Enable
Peripheral D Output Enable
Peripheral A Output Enable
Peripheral B Output Enable
Functional Description
Slow Clock
SAM3N
SAM3N
Peripheral A Output
Peripheral B Output
Peripheral C Output
Peripheral D Output
System Clock
PIO_DCIFSR[0]
PIO_SCIFSR[0]
PIO_IFSCR[0]
Divider
Clock
PIO_ABCDSR1[0]
PIO_ABCDSR2[0]
The PIO Controller features up to 32 fully-programmable I/O lines. Most of the control logic asso-
ciated to each I/O is represented in
represents but one of up to 32 possible indexes.
1
0
PIO_IFER[0]
PIO_IFDR[0]
Programmable
PIO_OER[0]
PIO_ODR[0]
Debouncing
00
01
10
11
00
01
10
11
PIO_IFSR[0]
Glitch
Filter
or
PIO_OSR[0]
PIO_SODR[0]
PIO_CODR[0]
PIO_PER[0]
PIO_PDR[0]
1
0
PIO_ODSR[0]
PIO_PSR[0]
Resynchronization
D
DFF
Q
Stage
D
PIO_PDSR[0]
DFF
Q
1
0
1
0
Figure
PIO_MDER[0]
PIO_MDDR[0]
DETECTOR
26-3. In this description each signal shown
PIO_IER[31]
PIO_IDR[31]
EVENT
PIO_MDSR[0]
PIO_IER[0]
PIO_IDR[0]
PIO_IMR[31]
PIO_ISR[31]
PIO_IMR[0]
1
0
0
1
PIO_PUDR[0]
PIO_PUER[0]
PIO_ISR[0]
PIO_PUSR[0]
(Up to 32 possible inputs)
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
PIO Interrupt
Peripheral C Input
Peripheral A Input
Peripheral B Input
Peripheral D Input
Pad