SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 150

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SAM3N0C

Manufacturer Part Number
SAM3N0C
Description
Manufacturer
Atmel Corporation
Datasheets
10.19 About the
150
SAM3N
Cortex-M3
The address map of the Private peripheral bus (PPB) is:
Table 10-26. Core peripheral register regions
1.
In register descriptions:
Address
0xE000E008-
0xE000E00F
0xE000E010-
0xE000E01F
0xE000E100-
0xE000E4EF
0xE000ED00-
0xE000ED3F
0xE000ED90-
0xE000ED93
0xE000EF00-
0xE000EF03
• the register type is described as follows:
• the required privilege gives the privilege level required to access the register, as follows:
RW
RO
WO
Privileged
Unprivileged
Software can read the MPU Type Register at 0xE000ED90 to test for the presence of a memory
peripherals
protection unit (MPU).
Read and write.
Read-only.
Write-only.
Core peripheral
System control block
System timer
Nested Vectored Interrupt
Controller
System control block
MPU Type Register
Nested Vectored Interrupt
Controller
Only privileged software can access the register.
Both unprivileged and privileged software can access the register.
Description
Table 10-30 on page 164
Table 10-33 on page 191
Table 10-27 on page 151
Table 10-30 on page 164
Reads as zero, indicating no MPU is
implemented
Table 10-27 on page 151
(1)
11011A–ATARM–04-Oct-10

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