SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 460

• Manufacturer Part Number: SAM3N0C
• Manufacturer: Atmel Corporation

• DLYBCT: Delay Between Consecutive Transfers
This field defines the delay between two consecutive transfers with the same peripheral without removing the chip select.
The delay is always inserted after each transfer and before removing the chip select if needed.
When DLYBCT equals zero, no delay between consecutive transfers is inserted and the clock keeps its duty cycle over the
character transfers.
Otherwise, the following equation determines the delay:
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Delay Between Consecutive Transfers
=
32
------------------------------------ -
×
MCK
DLYBCT
SAM3N
SAM3N
460
460