SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 350

• Manufacturer Part Number: SAM3N0C
• Manufacturer: Atmel Corporation

24.13 Clock Switching Details
24.13.1
24.13.2
350
SAM3N
Master Clock Switching Timings
Clock Switching Waveforms
Table 24-1
selected clock to another one. This is in the event that the prescaler is de-activated. When the
prescaler is activated, an additional time of 64 clock cycles of the new selected clock has to be
added.
Table 24-1.
Figure 24-4. Switch Master Clock from Slow Clock to PLL Clock
To
Main Clock
SLCK
PLL Clock
Write PMC_MCKR
Master Clock
gives the worst case timings required for the Master Clock to switch from one
Slow Clock
PLL Clock
From
MCKRDY
Clock Switching Timings (Worst Case)
LOCK
PLLCOUNT x SLCK +
0.5 x Main Clock +
0.5 x Main Clock +
2.5 x PLL Clock
Main Clock
4.5 x SLCK
4 x SLCK +
–
PLLCOUNT x SLCK
2.5 x PLL Clock +
2.5 x Main Clock
4 x SLCK +
5 x SLCK +
SLCK
–
PLLCOUNT x SLCK
2.5 x PLL Clock +
11011A–ATARM–04-Oct-10
3 x PLL Clock +
3 x PLL Clock +
1 x Main Clock
4 x SLCK +
4 x SLCK +
PLL Clock
5 x SLCK