SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 507

no-image

SAM3N0C

Manufacturer Part Number
SAM3N0C
Description
Manufacturer
Atmel Corporation
Datasheets
29.4.3
29.5
29.5.1
29.5.2
29.5.2.1
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
UART Operations
Interrupt Source
Baud Rate Generator
Receiver
Receiver Reset, Enable and Disable
The UART interrupt line is connected to one of the interrupt sources of the Nested Vectored
Interrupt Controller (NVIC). Interrupt handling requires programming of the NVIC before config-
uring the UART.
The UART operates in asynchronous mode only and supports only 8-bit character handling (with
parity). It has no clock pin.
The UART is made up of a receiver and a transmitter that operate independently, and a common
baud rate generator. Receiver timeout and transmitter time guard are not implemented. How-
ever, all the implemented features are compatible with those of a standard USART.
The baud rate generator provides the bit period clock named baud rate clock to both the receiver
and the transmitter.
The baud rate clock is the master clock divided by 16 times the value (CD) written in
UART_BRGR (Baud Rate Generator Register). If UART_BRGR is set to 0, the baud rate clock is
disabled and the UART remains inactive. The maximum allowable baud rate is Master Clock
divided by 16. The minimum allowable baud rate is Master Clock divided by (16 x 65536).
Figure 29-2. Baud Rate Generator
After device reset, the UART receiver is disabled and must be enabled before being used. The
receiver can be enabled by writing the control register UART_CR with the bit RXEN at 1. At this
command, the receiver starts looking for a start bit.
The programmer can disable the receiver by writing UART_CR with the bit RXDIS at 1. If the
receiver is waiting for a start bit, it is immediately stopped. However, if the receiver has already
detected a start bit and is receiving the data, it waits for the stop bit before actually stopping its
operation.
MCK
Baud Rate
16-bit Counter
=
----------------------- -
16
CD
MCK
×
CD
OUT
0
CD
>1
1
0
Divide
by 16
Baud Rate
Receiver
Sampling Clock
Clock
SAM3N
SAM3N
507
507

Related parts for SAM3N0C