SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 364

• Manufacturer Part Number: SAM3N0C
• Manufacturer: Atmel Corporation

24.15.10 PMC Master Clock Register
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CSS: Master Clock Source Selection
• PRES: Processor Clock Prescaler
• PLLDIV2: PLL Divisor by 2
364
31
23
15
–
–
–
7
–
PLLDIV2
SAM3N
Value
Value
0
1
2
3
0
1
2
3
4
5
6
7
0
1
PMC_MCKR
0x400E0430
Read-write
30
22
14
–
–
–
6
Name
SLOW_CLK
MAIN_CLK
PLL_CLK
–
Name
CLK
CLK_2
CLK_4
CLK_28
CLK_16
CLK_32
CLK_64
CLK_3
PLL Clock Division
PLL clock frequency is divided by 1
PLL clock frequency is divided by 2
PRES
29
21
13
–
–
–
5
PLLDIV2
28
20
12
–
–
4
Slow Clock is selected
Main Clock is selected
Description
Selected clock
Selected clock divided by 2
Selected clock divided by 4
Selected clock divided by 8
Selected clock divided by 16
Selected clock divided by 32
Selected clock divided by 64
Selected clock divided by 3
Description
PLL Clock is selected
Reserved
“PMC Write Protect Mode Register” on page
27
19
11
–
–
–
–
3
26
18
10
–
–
–
2
–
25
17
–
–
–
9
1
11011A–ATARM–04-Oct-10
CSS
374.
24
16
–
–
8
–
0