SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 683

• Manufacturer Part Number: SAM3N0C
• Manufacturer: Atmel Corporation

34.6.4
34.6.5
34.6.6
34.6.7
683
SAM3N
Conversion FIFO
Conversion Width
DAC Timings
Write Protection Registers
To provide flexibility and high efficiency, a 4 half-word FIFO is used to handle the data to be
converted.
As long as the TXRDY flag in the
ready to accept conversion requests by writing data in the
(DACC_CDR). Data which cannot be converted immediately are stored in the DACC FIFO.
When the FIFO is full or the DACC is not ready to accept conversion requests, the TXRDY flag
is inactive.
Warning: Writing in the DACC_CDR register while TXRDY flag is inactive will corrupt FIFO
data.
The WORD field of the
word transfer.
In half-word transfer mode only one 10-bit data item is sampled (DACC_MR[9:0]) per
DACC_CDR register write.
In word transfer mode each time the DACC_CDR register is written 2 data items are sampled.
Firs t data item sampled for conv ersion w ill be DAC C_CDR[9:0] and the second
DACC_CDR[25:16].
The DAC startup time must be defined by the user in the STARTUP field of the
Register.
The DAC maximum clock frequency is 13 MHz, therefore the internal trigger period can be con-
figured through the CLKDIV field of the
In order to bring security to the DACC, a write protection system has been implemented.
The write protection mode prevents the write of the
enabled and the protected register is written an error is generated in the
Status Register
the WPROTERR flag is set and the address of the corresponding canceled register write is
available in the WPROTADRR field of the
Due to the nature of the write protection feature, enabling and disabling the write protection
mode requires the use of a security code. Thus when enabling or disabling the write protection
mode, the WPKEY field of the
ASCII code (corresponding to 0x444143) otherwise the register write will be canceled.
and the register write request is canceled. When a write protection error occurs,
DACC Mode Register
DACC Write Protect Mode Register
DACC Interrupt Status Register
DACC Mode
DACC Write Protect Status
allows the user to switch between half-word and
Register.
DACC Mode
DACC Conversion Data Register
is active the DAC Controller is
Register. When this mode is
must be filled with the “DAC”
Register.
DACC Write Protect
11011A–ATARM–04-Oct-10
DACC Mode