SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 527

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SAM3N0C

Manufacturer Part Number
SAM3N0C
Description
Manufacturer
Atmel Corporation
Datasheets
30.6
30.6.1
30.6.2
30.6.3
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Product Dependencies
I/O Lines
Power Management
Interrupt
The pins used for interfacing the USART may be multiplexed with the PIO lines. The program-
mer must first program the PIO controller to assign the desired USART pins to their peripheral
function. If I/O lines of the USART are not used by the application, they can be used for other
purposes by the PIO Controller.
To prevent the TXD line from falling when the USART is disabled, the use of an internal pull up
is mandatory. If the hardware handshaking feature is used, the internal pull up on TXD must
also be enabled.
Table 30-3.
The USART is not continuously clocked. The programmer must first enable the USART Clock in
the Power Management Controller (PMC) before using the USART. However, if the application
does not require USART operations, the USART clock can be stopped when not needed and be
restarted later. In this case, the USART will resume its operations where it left off.
Configuring the USART does not require the USART clock to be enabled.
The USART interrupt line is connected on one of the internal sources of the Interrupt Controller.
Using the USART interrupt requires the Interrupt Controller to be programmed first. Note that it is
not recommended to use the USART interrupt line in edge sensitive mode.
Table 30-4.
Instance
USART0
USART1
Instance
USART0
USART0
USART0
USART0
USART0
USART1
USART1
USART1
USART1
USART1
I/O Lines
Peripheral IDs
14
15
ID
Signal
RXD0
RXD1
CTS0
RTS0
SCK0
TXD0
CTS1
RTS1
SCK1
TXD1
I/O Line
PA25
PA24
PA21
PA23
PA22
PA8
PA7
PA5
PA2
PA6
SAM3N
SAM3N
Peripheral
A
A
A
B
A
A
A
A
A
A
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