SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 122

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SAM3N0C

Manufacturer Part Number
SAM3N0C
Description
Manufacturer
Atmel Corporation
Datasheets
10.14.3
10.14.3.1
10.14.3.2
10.14.3.3
10.14.3.4
10.14.3.5
122
SDIV
UDIV
SAM3N
SDIV and UDIV
Syntax
Operation
Restrictions
Condition flags
Examples
R0, R2, R4
R8, R8, R1
Signed Divide and Unsigned Divide.
where:
cond
Rd
Rn
Rm
SDIV performs a signed integer division of the value in Rn by the value in Rm.
UDIV performs an unsigned integer division of the value in Rn by the value in Rm.
For both instructions, if the value in Rn is not divisible by the value in Rm, the result is rounded
towards zero.
Do not use SP and do not use PC
These instructions do not change the flags.
SDIV{cond} {Rd,} Rn, Rm
UDIV{cond} {Rd,} Rn, Rm
; Signed divide, R0 = R2/R4
; Unsigned divide, R8 = R8/R1
is an optional condition code, see
is the destination register. If Rd is omitted, the destination register is Rn.
is the register holding the value to be divided.
is a register holding the divisor.
.
“Conditional execution” on page
11011A–ATARM–04-Oct-10
84.

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