SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 475

• Manufacturer Part Number: SAM3N0C
• Manufacturer: Atmel Corporation

Figure 28-16. TWI Write Operation with Single Data Byte and Internal Address
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Internal address size (IADRSZ)
- Device slave address (DADR)
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
Write ==> bit MREAD = 0
TWI_THR = Data to send
Set the internal address
Set the Control register:
Write STOP command
- Transfer direction bit
TWI_IADR = address
Load transmit register
Read Status register
Read Status register
(Needed only once)
TWI_CR = STOP
Transfer finished
Yes
- Master enable
TXCOMP = 1?
Set TWI clock
TXRDY = 1?
Yes
BEGIN
No
No
SAM3N
SAM3N
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