RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 40

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RCLXT16706FE

Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet

Specifications of RCLXT16706FE

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
40
Table 4.
Pin Description (Sheet 26 of 66)
RRD_0
RRD_1
RRD_2
RRD_3
RRDC_0
RRDC_1
RRDC_2
RRDC_3
RMD_0
RMD_1
RMD_2
RMD_3
RMDC_0
RMDC_1
RMDC_2
RMDC_3
TRD_0
TRD_1
TRD_2
TRD_3
TRDC_0
TRDC_1
TRDC_2
TRDC_3
TMD_0
TMD_1
TMD_2
TMD_3
TMDC_0
TMDC_1
TMDC_2
TMDC_3
RROW_0
RROW_1
RROW_2
RROW_3
RMOW_0
RMOW_1
RMOW_2
RMOW_3
NOTE: See notes 1, 2, and
Pin Name
(OH Ports Logical Interface #3) (Quad OC-12c, OC-3c, and OC-1 modes)
G31
G27
AA1
AA3
AA2
G28
H29
K26
K28
H30
H31
K27
E28
F27
E29
E30
H26
E31
F28
H27
F29
Pin
J28
L26
J30
J31
J29
J26
W2
W1
W4
W3
W5
U6
V4
Y3
V6
Y2
V5
Y1
Y4
DCC and Orderwire Insertion/Extraction Ports Quad PHY Mode
LVTTL
Output
4 mA
LVTTL
Output
4 mA
LVTTL
Output
4 mA
LVTTL
Output
4 mA
LVTTL
Input
LVTTL
Output
4 mA
LVTTL
Input
LVTTL
Output
4 mA
LVTTL
Output
4 mA
LVTTL
Output
4 mA
Type
3
at the end of the table.
Receive RSOH D1-D3 Data. RRD_i (i = 0, 1, 2, 3) is a 192-Kbit/s data
output for the received RSOH D1-D3 data on channel #i.
RRD_i (i = 0, 1, 2, 3) is clocked out by RRDC_i.
Receive RSOH D1-D3 Data Clock. RRDC_i (i = 0, 1, 2, 3) is a 192-KHz
reference signal used to clock out the RRD_i data.
Receive MSOH D4-D12 Data. RMD_i (i = 0, 1, 2, 3) is a 576-Kbit/s data
output for the received RSOH D4-D12 data on channel #i.
RMD_i (i = 0, 1, 2, 3) is clocked out by RMDC_i.
Receive MSOH D4-D12 Data Clock. RMDC_i (i = 0, 1, 2, 3) is a 576-
KHz reference signal used to clock out the RMD_i data.
Transmit RSOH D1-D3 Data. TRD_i (i = 0, 1, 2, 3) is a 192-Kbit/s data
input for the transmit RSOH D1-D3 data on channel #i.
TRD_i (i = 0, 1, 2, 3) is clocked in by TRDC_i.
Transmit RSOH D1-D3 Data Clock. TRDC_i (i = 0, 1, 2, 3) is a 192-KHz
reference signal used to clock in the TRD_i data.
Transmit MSOH D4-D12 Data. TMD_i (i = 0, 1, 2, 3) is a 576-Kbit/s data
input for the transmit RSOH D4-D12 data on channel #i.
TMD_i (i = 0, 1, 2, 3) is clocked in by TMDC_i.
Transmit MSOH D4-D12 Data Clock. TMDC_i (i = 0, 1, 2, 3) is a 576-
KHz reference signal used to clock in the TMD_i data.
Receive RSOH E1 Orderwire. RROW_i (i = 0, 1, 2, 3) is a 64-Kbit/s
output for the received orderwire byte E1 on channel #i.
RROW_i (i = 0, 1, 2, 3) is synchronized with ROWBYC_i and clocked out
by ROWC_i.
Receive MSOH E2 Orderwire. RMOW_i (i = 0, 1, 2, 3) is a 64-Kbit/s
output for the received orderwire byte E2 on channel #i.
RMOW_i (i = 0, 1, 2, 3) is synchronized with ROWBYC_i and clocked out
by ROWC_i.
Description
Datasheet

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