RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 228

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
228
Bit
1:0
3
2
LineLoopBack
ChEna
ChRate[1:0]
Name
LineLoopBack disables the line loopback mode:
'0' = Line loopback is disabled. The transmitter operates normally.
'1' = Line loopback is enabled. The transmit line side interface
output clock and output data are flowed-through versions of the
receive line side interface inputs.
NOTE: The Line Loopback mode can be used ONLY if the
NOTE: When Intel IXF6048 is configured in Single transceiver
NOTE: In the line side loopback mode, the TPCO/TSCO is
ChEna controls the channel operation (both receive and transmit
directions):
'0' = Channel is disabled. The channel operation is stopped and
the channel output pins are tristated.
'1' = Channel is enabled. The channel operates normally.
ChRate[1:0] configures the channel in one of the following
modes:
'11' = 2.48832 Gb/s (OC-48)
'10' = 622.08 Mb/s (OC-12)
'01' = 155.52 Mb/s (OC-3)
'00' = 51.84 Mb/s (OC-1)
NOTE: When Intel IXF6048 is configured in Quad transceiver
NOTE: When Intel IXF6048 is configured in Single transceiver
RcvIFMode[2:0] (register R_COCNF) and
XmtIFMode[2:0] (register T_COCNF) values match.
mode (a single line side interface), the Line Loopback
feature is enabled/disabled using channel #0 register.
always sourced from the associated RPCI/RSCI no
matter what source/reference is selected in
(T_COCNF—Transmit Channel Operational
Configuration Register ((0cc)0BH) bit 9:8
<XmtTimRef[1:0]>) but the transmit divider (T_COCNF—
Transmit Channel Operational Configuration Register
((0cc)0BH) bit 7:5 <XmtCOCnf[2:0]>) needs to be
changed if the TPCI/TSCI clock is different than the
RPCI/RSCI clock.
mode (four line side interfaces), configuration value '11'
(OC-48 mode) is invalid.
mode (single line side interface), Intel IXF6048’s rate is
configured by using channel #0 register.
Description
Type
R/W
R/W
R/W
Datasheet
Default
'11'
'0'
'1'