RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 312

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
11.12.4
11.12.5
11.12.6
312
31:24
15:2
15:2
23:0
Bit
Bit
Bit
1
0
1
0
Unused
XmtICellCntI
XmtACellCntI
Unused
XmtICellCntIEn
XmtACellCntIEn
Unused
XmtICellCnt[23:0]
T_ICELLCNT—Transmit Idle Cell Counter ((1cc)15H-(1cc)14H)
T_ATMINT—Transmit ATM Interrupt Register ((1cc)16H)
T_ATMINTEN—Transmit ATM Interrupt Enable ((1cc)17H)
(1cc)15H = Bits[23:16], (1cc)14H = Bits[15:0]
Name
Name
Name
XmtICellCntI sets to logic one when the “transmit idle cell counter”
(register T_ICELLCNT) rolls over.
This interrupt bit clears automatically when this register is read.
XmtACellCntI sets to logic one when the “transmit ATM cell
counter” (register T_ACELLCNT) rolls over.
This interrupt bit clears automatically when this register is read.
Active-high enable for the XmtICellCntI interrupt bit
Active-high enable for the XmtACellCntI interrupt bit
XmtICellCnt[31:0] counts the number of idle cells generated
and mapped into the transmitted SONET/SDH frames during
the last accumulation interval. This counter only counts the
idle cells generated by the cell rate decoupling process: the
idle cells generated when the transmit FIFO does not
contain a complete ATM cell. This counter does not count
the null cells generated by the Generic Flow Control (GFC)
Halt function.
A write to the counter (address (1cc)15H) causes the entire
counter to be loaded into a buffer and then cleared. The
contents of the buffer can then be read.
Description
Description
Description
Type
Type
Type
R/W
R/W
R
R
R
Datasheet
Default
Default
Default
00H
'0'
'0'
'0'
'0'