RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 306

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
11.11.3
11.11.4
306
31:18
31:24
18:0
23:0
Bit
Bit
Table 27. LCD Filter Configuration Examples
Unused
RcvLCDFltr[18:0]
Unused
RcvACellCnt[23:0]
R_LCDFLTR—Receive LCD Filter ((1cc)23H-(1cc)22H)
R_ACELLCNT—Receive ATM Cell Counter ((1cc)25H-(1cc)24H)
(1cc)23H = Bits[18:16], (1cc)22H = Bits[15:0]
(1cc)25H = Bits[23:16], (1cc)24H = Bits[15:0]
OC-1 (clock-period = 617.28 ns)
OC-3 (clock-period = 205.76 ns)
OC-12 (clock-period = 51.44 ns)
OC-48 (clock-period = 12.86 ns)
Name
Name
RcvLCDFltr[18:0] contains the number of consecutive cell periods
used to filter the LCD (loss of cell delineation) defect.
The LCD defect is declared if an OCD (out of cell delineation)
anomaly has persisted for more than RcvLCDFltr[18:0] cell
periods. The LCD defect terminates when the cell delineation
process enters and remains in the SYNC state for more than
RcvLCDFltr[18:0] cell periods.
The default value sets a delay of 1 ms for OC-48c.
Table 27
ms, 3 ms and 4 ms for OC-1, OC-3, OC-12 and OC-48.
RcvACellCnt[23:0] counts the number of ATM cells accepted
(written into the FIFO) during the last accumulation interval.
A write to the counter (address (1cc)25H) causes the entire
counter to be loaded into a buffer and then cleared. The
contents of the buffer can then be read.
shows configuration examples of setting delays of 1 ms, 2
Description
Description
012FCH
04BF0H
12FC0H
00654H
1 ms
00CA8H
025F8H
097E0H
25F81H
2 ms
0E3D0H
012FCH
038F4H
38F41H
3 ms
Type
Type
R/W
R
Datasheet
12FC0H
04BF0H
4BF02H
01950H
12FC0H
Default
4 ms
Default
00H