RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 266

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RCLXT16706FE

Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet

Specifications of RCLXT16706FE

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
11.4.9
11.4.10
266
15:5
15:10
Bit
6
5
4
Bit
Bit
3
2
1
0
9
8
7
6
5
4
3
2
1
0
Unused
J0UnStableSt
J0MsMtchSt
J0Crc7ErrSt
Los
Lock
Lof
Oof
Unused
OofOvrFlwEn
B1OvrFlwEn
Unused
J0UnStableEn
J0MsMtchEn
J0Crc7ErrEn
LosEn
LockEn
LofEn
OofEn
Name
Name
IE_RG—Receive Regenerator Section Interrupt Enable ((1cc)D4H)
S_RG—Receive Regenerator Section Status ((1cc)D8H)
Name
This bit sets when there is a change in the LosSt bit (register S_RG[3]). It
clears when this register (IS_RG) is read
This bit sets when there is a change in the LockSt bit (register S_RG[2]).
It clears when this register (IS_RG) is read.
This bit sets when there is a change in the LofSt bit (register S_RG[1]). It
clears when this register (IS_RG) is read.
This bit sets when there is a change in the OofSt bit (register S_RG[0]). It
clears when this register (IS_RG) is read.
Present status of receive unstable/stable section trace detect (accepted
trace when stable):
'0' = Receive stable/accepted trace detected.
'1' = Receive unstable trace.
Present status of comparison between received and expected J0 string
(Trace Identifier Mismatch):
'0' = OK comparison
'1' = Bad comparison
Present status of comparison between received and calculated J0 string
CRC-7 value (if 16-byte trace format):
'0' = No CRC-7 error detected in the section trace
'1' = CRC-7 error detected in the section trace
Active-high enable for the OofOvrFlw interrupt bit.
Active-high enable for the B1OvrFlw interrupt bit.
Active-high enable for the J0Unstable interrupt bit.
Active-high enable for the J0MsMtch interrupt bit.
Active-high enable for the J0Crc7Err interrupt bit.
Active-high enable for the LOS interrupt bit.
Active-high enable for the Lock interrupt bit.
Active-high enable for the LOF interrupt bit.
Active-high enable for the OOF interrupt bit.
Description
Description
Description
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
Datasheet
Default
Default
Default
'X'
'X'
'X'
'0'
'0'
'0'
'0'
0
0
0
0
0
0
0
0
0

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