RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 325
RCLXT16706FE
Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet
1.RCLXT16706FE.pdf
(352 pages)
Specifications of RCLXT16706FE
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
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11.14.8
Datasheet
15:7
Bit
Bit
2
1
0
6
5
4
3
2
1
0
XmtAbortI
XmtFCSI
XmtFifoUFI
Unused
XmtByteCntIEn
XmtFrmCntIEn
XmtAbortCntIEn
XmtFifoUFCntIEn
XmtAbortIEn
XmtFCSIEn
XmtFifoUFIEn
T_POSINTEN—Transmit POS Interrupt Enable ((1cc)4AH)
Name
Name
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
XmtAbortI sets to logic one when a packet is aborted by the Link
Layer device by using the TXERR input.
This interrupt bit clears automatically when this register is read.
XmtFCSI sets to logic one when an FCS error is inserted into a
packet
This interrupt bit clears automatically when this register is read.
XmtFifoUFI sets to logic one when a transmit FIFO underflow
occurs when reading a word of a partially transmitted packet (not
the first word).
When a FIFO underflow occurs, the incompletely transmitted
packet is aborted (finished with an Abort sequence). Then the
contents of the transmit FIFO is read and ignored until a new start
of packet is read from the FIFO.
This interrupt bit clears automatically when this register is read.
Active-high enable for the XmtByteCntI interrupt bit.
Active-high enable for the XmtFrmCntI interrupt bit.
Active-high enable for the XmtAbortCntI interrupt bit.
Active-high enable for the XmtFifoUFCntI interrupt bit.
Active-high enable for the XmtAbortI interrupt bit.
Active-high enable for the XmtFCSI interrupt bit.
Active-high enable for the XmtFifoUFI interrupt bit.
Description
Description
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
Default
Default
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
325
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