RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 198

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RCLXT16706FE

Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet

Specifications of RCLXT16706FE

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
8.2
8.2.1
198
Figure 61. POS-Packet Data Structure Using the 32-Bit UTOPIA Interface
Figure 62. POS-Packet Data Structure Using the 16-Bit UTOPIA Interface
Figure 63. POS-Packet Data Structure Using the 8-Bit UTOPIA Interface
Receive POS-UTOPIA Interface
Port Selection Mode
The receive POS-UTOPIA interface can be configured to operate as the ATM-UTOPIA interface
(using a port selection cycle) or as a simple memory mapped device.
When configuration bit RcvSelMode = '0' (global register R_UICNF), the receive POS-
UTOPIA interface operates in a similar way to the ATM-UTOPIA interface. Two independent
processes run in parallel: the data transfer and the FIFO status polling. RXADDR[4:0] are
used to poll the status of the FIFOs (using the output RXPFA) and to select a port when
Word n/4 -1
Word n/4
Word 1
Word 2
Word 3
Word n/2 -1
Bit 31
Word n/2
Word 1
Word 2
Word 3
Byte n -7
Byte n -3
Byte 1
Byte 5
Byte9
Word n-1
Word 1
Word 2
Word 3
Word n
Bit 15
Byte n -3
Byte n -1
or Padding
Byte n -6
Byte n -2
Byte 1
Byte 3
Byte 5
Byte 10
Byte 6
Byte2
Bit 7
Byte n -1
Byte 1
Byte 2
Byte 3
Byte n
or Padding
Bit 0
Byte n -2
or Padding
Byte n -5
Byte n -1
Byte 2
Byte 4
Byte 6
Byte n
Byte 11
Byte 3
Byte 7
Bit 0
or Padding
Byte n -4
Byte 12
Byte 4
Byte 8
Byte n
Bit 0
Datasheet

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