RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 16
RCLXT16706FE
Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet
1.RCLXT16706FE.pdf
(352 pages)
Specifications of RCLXT16706FE
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
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Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
16
Table 4.
Pin Description (Sheet 2 of 66)
RFPI_P
RFPI_N
RLOCK
ROOF
RPCO
NOTE: See notes 1, 2, and
Pin Name
AG19
AA27
AC31
AF19
Y27
Pin
Diff.
LVPECL
Input
LVTTL
Input
LVTTL
Output
12 mA
LVTTL
Output
12 mA
Type
3
at the end of the table.
Receive Frame Position Input PECL. RFPI_P/N is an active-high
frame position input allowing connection to an external OC-192 SONET/
SDH demultiplexer. RFPI_P/N indicates the SONET/SDH frame position
on the RPDI_P/N[15:0] bus.
The byte position indicated by RFPI_P/N is selected by using
RcvFPICnf[7:0] (global register R_FPCNF). RFPI_P/N should be active-
high for a single RPCI_P/N period. Intel IXF6048 ignores pulses on
RFPI_P/N while “in frame” (ROOF_0 = '0').
RFPI_P/N is sampled on the rising edge of RPCI_P
When frame alignment is enabled (bit RcvFBaDsbl = ‘0’ in register
R_RSTC), RFPI_P have to be tied to GND_PECL and RFPI_N should
be tied to VDD_PECL.
Receive Lock Detect TTL. RLOCK is the active-high Lock Detect input.
RLOCK indicates that the external clock recovery PLL is locked.
RLOCK is not required to be synchronous with RPCI_P/N.
Receive Out of Frame TTL. ROOF is high while the receiver is “out of
frame” and low while it is “in frame.”
ROOF is updated on the rising edge of RPCI_P.
Receive Parallel Clock Output TTL. RPCO is a divided version of
RPCI_P. RcvCOCnf[2:0] (register R_COCNF) configures the RPCO
output as a 77.76 MHz, 38.88 MHz, 19.44 MHz, or 8 KHz clock.
Description
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