RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 236

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
11.2.15
236
Bit
7:0
Bit
15
14
13
12
11
10
XmtFPICnf[7:0]
Pol_TCO_T3
Pol_TCO_T2
Pol_TCO_T1
Pol_TCO_T0
Pol_RCO_T3
Pol_RCO_T2
OCPCNF—Output Clock Polarity Configuration ((000)0FH)
This register allows inversion of each individual Intel IXF6048 output clock.
When the polarity configuration bit of an output clock is set to logic one, Intel IXF6048 inverts the
clock before driving the output pin.
Name
Name
XmtFPICnf[7:0] configures the transmit input frame pulse, relative to
the frameword transmitted on the transmit data output bus.
XmtFPICnf[7:0] are used to configure all the different parallel
transmit interfaces:
Frame Pulse Input Data Output Bus
TFPI_P/N
TFPI
TFPI_0
TFPI_1
TFPI_2
TFPI_3
The transmit frame pulse input pin is set to logic one to denote that
the transmit data output bus MUST carry (in the same clock cycle)
the byte indicated by XmtFPICnf[7:0]. The value of XmtFPICnf[7:0]
selects a byte position in the first row of the SONET/SDH frame.
XmtFPICnf[7:0] = '0' selects the first A1 byte, XmtFPICnf[7:0] = '1'
selects the second A1 byte, etc.
The next example shows the XmtFPICnf[7:0] coding for OC-48c/
OC-48:
'0' = First A1 byte
'1' = Second A1 byte
……
47 = Last A1 byte
48 = First A2 byte
……
144 = First SPE byte
……
'0' = TSCO_3 and TPCO_3 clocks are not inverted.
'1' = TSCO_3 and TPCO_3 clocks are inverted.
'0' = TSCO_2 and TPCO_2 clocks are not inverted.
'1' = TSCO_2 and TPCO_2 clocks are inverted.
'0' = TSCO_1 and TPCO_1 clocks are not inverted.
'1' = TSCO_1 and TPCO_1 clocks are inverted.
'0' = TSCO_0, TPCO_0, and TPCO clocks are not inverted.
'1' = TSCO_0, TPCO_0, and TPCO clocks are inverted.
'0' = RSCO_3 and RPCO_3 clocks are not inverted.
'1' = RSCO_3 and RPCO_3 clocks are inverted.
'0' = RSCO_2 and RPCO_2 clocks are not inverted.
'1' = RSCO_2 and RPCO_2 clocks are inverted.
TPDO_P/N[15:0] or TPDO_P/N[7:0]
TPDO[31:0]
TPDO_0[7:0]
TPDO_1[7:0]
TPDO_2[7:0]
TPDO_3[7:0]
Description
Description
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Datasheet
Default
Default
30H
'0'
'0'
'0'
'0'
'0'
'0'