RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 135

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

4.4.2.4
Datasheet
4.4.2.3.7 Undefined MSOH Bytes
The undefined MSOH bytes of the ATM/POS physical layer are unused. Their source is specified
by register T_SC_MSOH, combined with input serial bus control pin TSOHINS, as coming from:
Regenerator Section Transmitter
The Regenerator section inserts the RSOH overhead bytes. In a repeater configuration, the received
RSOH byte (except A1, A2, and B1) can be in a group or passed through individually, unchanged.
4.4.2.4.1 A1 and A2 Framing Bytes
The frame keyword bytes are always regenerated in the Intel IXF6048 transmitter regardless of the
configuration. For testing purposes, it is possible to invert A1 value (via register T_RMST_OP).
The A1 value can be inverted for four frames only (to generate an OOF alarm for 2 frames in the
receiver) or for an indefinite duration.
These bytes may also be sourced from the TSOH serial bus input, when this interface is enabled
and the TSOHINS control input pin is set high on the framing byte time slots.
4.4.2.4.2 The Regenerator Section Trace J0
This byte is inserted to repetitively transmit a Section Access Identifier so that a section receiver
can verify its continued connection to the intended transmitter.
The J0 string length is configurable via register T_RMST_OP to be either a 1-byte, a 16-byte (with
CRC-7), or a 64-byte trace message. When configured as a 16-byte message, the 16-byte expected
J0 string value needs to have the correct CRC-7 bits per G.707 specifications.
J0 is provided by one of the three sources configured in register T_SC_RSOH, combined with
input serial bus control pin TSOHINS:
The RAM is accessed via register T_J0_STRA. Note that a complete 16-byte string, with CRC-7,
is required by the ITU for proper operation.
Compatibility of J0 with in-service equipment can be provided by either writing a value into the
transmit J0 RAM (when configured in 1-byte string length mode) or by setting J0 byte to its default
value 01H (if not used, or as former C1 byte), via register T_RMST_OP.
— The serial TSOH interface (TSOH input pin).
— The incoming byte from the downstream data. Only possible in non repeater mode. In this
— The internal common unused Overhead byte transmit default value (all '0's).
— The serial TSOH interface (TSOH input pin).
— The incoming byte from the downstream data (The received byte (Repeater mode) from
— An internal RAM (up to 64-bytes).
case, all undefined MSOH bytes are configured in pass-through mode.
the Regenerator Section receiver).
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
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