KIT_TC1797_SK Infineon Technologies, KIT_TC1797_SK Datasheet - Page 91

• Manufacturer Part Number: KIT_TC1797_SK
• Description: KIT STARTER AUDO FUTURE TC1797
• Manufacturer: Infineon Technologies
• Series: Audo Futurer
• Type: MCUr

Specifications of KIT_TC1797_SK

• Contents: Board, Adapters, Cables, CD, Power Supply
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TC1797
• Other names: KITTC1797SKIN

•
Therefore, make sure that the SDI line is pulled high (e.g. with an internal or
external pull-up) while no transmission is performed.
MSC_TC.H008 The LVDS pads require a settling time when coming up
from pad power-down state.
The LVDS pad power-down state is the default state for the LVDS pad at:
•
•
•
The settling time until reaching normal operating electrical levels is defined as
the duration between programming of the relevant PDR register to enable
LVDS and the time where the LVDS pads reach the specified operating levels
in the datasheets.
This settling time:
•
•
•
•
The settling time is shown in the Table 1 below:
Table 11
Conditions
Note: LVDS settling time for higher temperatures remains within the limits
TC1797, EES-AC, ES-AC, AC
+25°C,
-40°C,
-40°C,
after a frame has been received, and the SDI line is on a low level at the end
of the last stop bit time slot (e.g. when the SDI line is permanently held low).
power-up
all resets (including software reset)
as soon as the LVDS is disabled (by PDR register).
increases with decreasing temperature (first order)
decreases with increasing voltage supply,
is not dependent on the external capacitive load on the LVDS pads
is not dependent on the system frequency
defined above by +25°C.
V
V
V
DDP
DDP
DDP
LVDS pads settling time
= 3.3v
= 3.14v 520µs
= 3.3v
Typical
15µs
470µs
91/101
V
DDP
Maximum
60µs
1.3ms
1.4ms
(second order)
Application Hints
Rel. 1.3, 18.12.2009
Errata Sheet