KIT_TC1797_SK Infineon Technologies, KIT_TC1797_SK Datasheet - Page 27

• Manufacturer Part Number: KIT_TC1797_SK
• Description: KIT STARTER AUDO FUTURE TC1797
• Manufacturer: Infineon Technologies
• Series: Audo Futurer
• Type: MCUr

Specifications of KIT_TC1797_SK

• Contents: Board, Adapters, Cables, CD, Power Supply
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TC1797
• Other names: KITTC1797SKIN

Note that this code segment assumes that the BTV CSFR is static during
runtime. If this is not the case then it would be necessary to determine the trap
offset address during runtime by reading the BTV CSFR and ORing with the
TCN offset of the trap of interest. If more than one trap class is considered
timing critical within a system, it is possible to adapt the previous code to check
the return address of the interrupt handler against a number (or range) of trap
class entry addresses.
If the interrupted traps are considered recoverable, and are not time sensitive,
the interrupt handler can simply complete and it's terminating RFE will correctly
return execution to the first instruction of the trap handler - where it will now
execute to completion without undesired interruption. If the interrupted traps are
considered recoverable but are time sensitive and need to be executed
immediately, then some method of deferring the interrupt processing is
required. If the test of the situation (e.g. checking the PCXI.PIE bit is clear) is
at the start of the Interrupt handler, then there are two simple methods to
consider:
The first method would be to re-request the interrupt, by writing the appropriate
Service Request Control Register with the SETR bit set to one, and then
executing an RFE which will be taken back to the trap handler. The interrupt will
now be pending again, but will not be taken until the trap handler executes its
RFE to re-enable interrupts. This method is simple if the device (and hence it's
SRC register address) generating the interrupt is known. If this is not easy to
determine (statically or dynamically), the second method might be preferred.
The second method would be to jump to the trap handler, after setting the trap
identification number (TIN) and the return address (which the trap handler will
use) to be the next instruction in the interrupt handler. This relies on the fact that
the CSA saved away by the preemption of the trap handler is equally valid as
an execution context for the interrupt handler. The code for this method is as
follows:
interruptN:
TC1797, EES-AC, ES-AC, AC
eq.a
lea
< Call / Branch to NMI handler based on d13 result >
mfcr
jnz.t
d13, a12, a11
a12, [a12]@los(NMITrapAddress)
d15, PCXI
d15, 23, interruptReal
; Compare with A11, result in d13
27/101
; BTV OR 0xE0
Functional Deviations
Rel. 1.3, 18.12.2009
Errata Sheet