KIT_TC1797_SK Infineon Technologies, KIT_TC1797_SK Datasheet - Page 67

• Manufacturer Part Number: KIT_TC1797_SK
• Description: KIT STARTER AUDO FUTURE TC1797
• Manufacturer: Infineon Technologies
• Series: Audo Futurer
• Type: MCUr

Specifications of KIT_TC1797_SK

• Contents: Board, Adapters, Cables, CD, Power Supply
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TC1797
• Other names: KITTC1797SKIN

Workaround
There is no workaround available.
Attention: Do not assert restart for longer periods of time unless the
OCDS_AI.002 JTAG Instruction must be 8 bit long
The JTAG TAP controller implemented in all Infineon devices strictly adheres to
the standard IEEE 1149-1-2001. One side effect of this standard requires
special awareness, as it can cause severe errors.
Upon entry to the Capture-IR state the internal shift register is preloaded with
a constant, namely 01
In the Shift-IR state the bits from the host are prepended, i.e. for each incoming
bit the old LSB is dropped, the remaining 7 bits are shifted right one bit position
and the incoming bit becomes the new MSB.
Upon entry to the Update-IR state the content of the internal shift register is
copied into the INSTRUCTION register unconditionally.
If the final state of the shift register happens to be a valid, but unintended
instruction, the device may enter a state very detrimental to the application. An
extreme example is the INTEST instruction, which turns off all outputs of the
device and is activated by instruction 01
host!
Recommendations
•
•
•
TC1797, EES-AC, ES-AC, AC
Always shift in at least as many bits as the INSTRUCTION register holds.
This means 8 bit for Infineon devices.
Check the bits returned via TDO: Must be 01
in excluding the last eight bits. This allows to “check the pipe” by shifting in
more than the required 8 bits.
Use the protection offered by IOPATH: Keeping IOPATH different from 00
whenever possible will block all Boundary Scan functions.
interface shall be functionally “locked”. The bug-fixed version
of future devices will also reset DAP as long as restart is
asserted, but will additionally store the rising edge until at least
two DAP0 clock edges have been seen.
H
.
67/101
H
, i.e. if no bit at all is shifted in by the
H
followed by any data shifted
Functional Deviations
Rel. 1.3, 18.12.2009
Errata Sheet
B