KIT_TC1797_SK Infineon Technologies, KIT_TC1797_SK Datasheet - Page 81
KIT_TC1797_SK
Manufacturer Part Number
KIT_TC1797_SK
Description
KIT STARTER AUDO FUTURE TC1797
Manufacturer
Infineon Technologies
Series
Audo Futurer
Type
MCUr
Datasheets
1.SAK-TC1797-512F180E_AC.pdf
(190 pages)
2.KIT_TC1791_SK.pdf
(46 pages)
3.KIT_TC1797_SK.pdf
(101 pages)
4.KIT_TC1797_SK.pdf
(12 pages)
Specifications of KIT_TC1797_SK
Contents
Board, Adapters, Cables, CD, Power Supply
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
TC1797
Other names
KITTC1797SKIN
- SAK-TC1797-512F180E_AC PDF datasheet
- KIT_TC1791_SK PDF datasheet #2
- KIT_TC1797_SK PDF datasheet #3
- KIT_TC1797_SK PDF datasheet #4
- Current page: 81 of 101
- Download datasheet (4Mb)
Errata Sheet
Functional Deviations
SSC_AI.023 Clock phase control causes failing data transmission in
slave mode
If SSC_CON.PH = 1 and no leading delay is issued by the master, the data
output of the slave will be corrupted. The reason is that the chip select of the
master enables the data output of the slave. As long as the chip is inactive the
slave data output is also inactive.
Workaround
A leading delay should be used by the master.
A second possibility would be to initialize the first bit to be sent to the same
value as the content of PISEL.STIP.
SSC_AI.024 SLSO output gets stuck if a reconfig from slave to master
mode happens
The slave select output SLSO gets stuck if the SSC will be re-configured from
slave to master mode. The SLSO will not be deactivated and therefore not
correct for the 1st transmission in master mode. After this 1st transmission the
chip select will be deactivated and working correctly for the following
transmissions.
Workaround
Ignore the 1st data transmission of the SSC when changed from slave to master
mode.
SSC_AI.025 First shift clock period will be one PLL clock too short be-
cause not syncronized to baudrate
The first shift clock signal duration of the master is one PLL clock cycle shorter
than it should be after a new transmit request happens at the end of the
previous transmission. In this case the previous transmission had a trailing
delay and an inactive delay.
TC1797, EES-AC, ES-AC, AC
81/101
Rel. 1.3, 18.12.2009
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