KIT_TC1797_SK Infineon Technologies, KIT_TC1797_SK Datasheet - Page 15

• Manufacturer Part Number: KIT_TC1797_SK
• Description: KIT STARTER AUDO FUTURE TC1797
• Manufacturer: Infineon Technologies
• Series: Audo Futurer
• Type: MCUr

Specifications of KIT_TC1797_SK

• Contents: Board, Adapters, Cables, CD, Power Supply
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TC1797
• Other names: KITTC1797SKIN

the update priority is incorrect. In this case, the PSW user status bits are updated
with the value from the IP instruction rather than the later MTCR instruction.
This situation only occurs in 2 cases:
•
•
Example
Workaround
Insert one NOP instruction between the MUL/MADD/MSUB/RSTV instruction
and the MTCR instruction updating the PSW.
CPU_TC.107 SYSCON.FCDSF may not be set after FCD Trap
Under certain conditions the SYSCON.FCDSF flag may not be set after an FCD
trap is entered. This situation may occur when the CSA (Context Save Area) list
is located in cacheable memory, or, dependent upon the state of the upper
context shadow registers, when the CSA list is located in LDRAM.
The SYSCON.FCDSF flag may be used by other trap handlers, typically those
for asynchronous traps, to determine if an FCD trap handler was in progress
when the another trap was taken.
Workaround
In the case where the CSA list is statically located in memory, asynchronous
trap handlers may detect that an FCD trap was in progress by comparing the
TC1797, EES-AC, ES-AC, AC
...
rstv
mtcr #PSW, dY
...
...
rstv
nop
mtcr #PSW, dY
...
MUL/MADD/MSUB instruction followed by MTCR PSW
RSTV instruction followed by MTCR PSW
; Modify PSW
; Modify PSW
15/101
Functional Deviations
Rel. 1.3, 18.12.2009
Errata Sheet