KIT_TC1797_SK Infineon Technologies, KIT_TC1797_SK Datasheet - Page 80

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KIT_TC1797_SK

Manufacturer Part Number
KIT_TC1797_SK
Description
KIT STARTER AUDO FUTURE TC1797
Manufacturer
Infineon Technologies
Series
Audo Futurer
Type
MCUr

Specifications of KIT_TC1797_SK

Contents
Board, Adapters, Cables, CD, Power Supply
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
TC1797
Other names
KITTC1797SKIN
If bit field SCU_RSTSTAT.ESR0 needs to contain a value different from 00
instead
SCU_RSTSTATCB0, SCU_RSTSTATCB1, and SCU_RSTSTATCB3 should
be checked to be set.
SCU_TC.016 Reset Value of Registers ESRCFG0/1
The reset value of register SCU_ESRCFG0 is 0x00000100 (instead of
0x00000110).
The reset value of register SCU_ESRCFG1 is 0x00000080 (instead of
0x00000090).
This means that bit DFEN = 0
after a System Reset.
Note: The 3-stage median filter operates on the FPI-Bus frequency. All input
Workaround
In case the digital 3-stage median filter shall be enabled, bit DFEN must be set
to 1
SSC_AI.022 Phase error detection switched off too early at the end of a
transmission
The phase error detection will be switched off too early at the end of a
transmission. If the phase error occurs at the last bit to be transmitted, the
phase error is lost.
Workaround
Don’t use the phase error detection.
TC1797, EES-AC, ES-AC, AC
B
by software.
spikes lasting less than one FPI-Bus cycle are reliably suppressed. Any
request lasting at least 2 FPI-Bus cycles is reliably recognized.
of
checking
bit
B
, i.e. the digital 3-stage median filter is disabled
SCU_RSTSTAT.PORST
80/101
Functional Deviations
the
Rel. 1.3, 18.12.2009
Errata Sheet
three
bits
B

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