LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 47

• Manufacturer Part Number: LSM320DLTR
• Description: IC LINEAR
• Manufacturer: STMicroelectronics

Specifications of LSM320DLTR

• Lead Free Status / Rohs Status: Compliant

LSM320DL
7.38
7.39
7.40
Table 92.
Interrupt source register. Read only register.
Reading at this address clears the INT1_SRC IA bit (and eventually the interrupt signal on
the INT1 pin) and allows the refreshment of data in the INT1_SRC register if the latched
option is chosen.
INT1_THS_XH_G (32h)
Table 93.
Table 94.
INT1_THS_XL_G (33h)
Table 95.
Table 96.
INT1_THS_ZH_G (36h)
Table 97.
IA
ZH
ZL
XH
XL
THSX14 - THSX9
THSX7
THSX7 - THSX0
--
--
Interrupt active. Default value: 0
(0: no interrupt has been generated; 1: one or more interrupts have been generated)
Z high. Default value: 0 (0: no interrupt; 1: Z high event has occurred)
Z low. Default value: 0 (0: no interrupt; 1: Z low event has occurred)
X high. Default value: 0 (0: no interrupt; 1: X high event has occurred)
X low. Default value: 0 (0: no interrupt; 1: X low event has occurred)
INT1_SRC_G description
INT1_THS_XH_G register
INT1_THS_XH_G description
INT1_THS_XL_G register
INT1_THS_XL_G description
INT1_THS_ZH_G register
THSX14
THSZ14
THSX6
Interrupt threshold. Default value: 0000 0000
Interrupt threshold. Default value: 0000 0000
THSX13
THSZ13
THSX5
Doc ID 018845 Rev 1
THSX12
THSZ12
THSX4
THSX11
THSZ11
THSX3
THSX10
THSZ10
THSX2
Registers description
THSX9
THSX1
THSZ9
THSX8
THSX0
THSZ8
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