LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 40

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LSM320DLTR

Manufacturer Part Number
LSM320DLTR
Description
IC LINEAR
Manufacturer
STMicroelectronics
Datasheet

Specifications of LSM320DLTR

Lead Free Status / Rohs Status
Compliant
Registers description
7.25
40/53
Table 64.
Combination of PD, Zen, Xen are used to set the device in different modes (power-
down/normal/sleep mode) according to the following table.
Table 65.
CTRL_REG2_G (21h)
Table 66.
1. Value loaded at boot. This value must not be changed.
00
00
00
00
01
01
01
01
10
10
10
10
11
11
11
11
0
(1)
Power-down
DR <1:0>
Normal
Mode
Sleep
DR and BW configuration setting
Power mode selection configuration
CTRL_REG2_G register
0
(1)
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
HPM1
BW <1:0>
Doc ID 018845 Rev 1
PD
0
1
1
HPM1
100
100
100
100
200
200
200
200
400
400
400
400
800
800
800
800
HPCF3
ODR [Hz]
Zen
0
-
-
HPCF2
12.5
25
25
25
12.5
25
50
70
20
25
50
110
30
35
50
110
HPCF1
Cut-off
Xen
0
-
-
LSM320DL
HPCF0

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