LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 35

• Manufacturer Part Number: LSM320DLTR
• Description: IC LINEAR
• Manufacturer: STMicroelectronics

Specifications of LSM320DLTR

• Lead Free Status / Rohs Status: Compliant

LSM320DL
7.13
7.14
FIFO_SRC_REG_A (2Fh)
Table 40.
INT1_CFG_A (30h)
Table 41.
Table 42.
Content of this register is loaded at boot.
Write operation at this address is possible only after system boot.
Table 43.
Difference between AOI-6D = ‘01’ and AOI-6D = ‘11’.
WTM
AOI
AOI
6D
ZHIE/
ZUPE
ZLIE/
ZDOWNE
YHIE/
YUPE
YLIE/
YDOWNE
XHIE/
XUPE
XLIE/XDOWNE Enable interrupt generation on X low event or on direction recognition. Default
AOI
0
0
1
1
6D
OVRN_FIFO
6D
FIFO_SRC_REG_A register
INT1_CFG_REG_A register
INT1_CFG_REG_A description
Interrupt mode
0
1
0
1
ZUPE
AND/OR combination of interrupt events. Default value: 0. Refer to
6-direction detection function enabled. Default value: 0. Refer to
Enable interrupt generation on Z high event or on direction recognition. Default
value: 0 (0: disable interrupt request;1: enable interrupt request)
Enable interrupt generation on Z low event or on direction recognition. Default
value: 0 (0: disable interrupt request; 1: enable interrupt request)
Enable interrupt generation on Y high event or on direction recognition. Default
value: 0 (0: disable interrupt request; 1: enable interrupt request.)
Enable interrupt generation on Y low event or on direction recognition. Default
value: 0 (0: disable interrupt request; 1: enable interrupt request.)
Enable interrupt generation on X high event or on direction recognition. Default
value: 0 (0: disable interrupt request; 1: enable interrupt request.)
value: 0 (0: disable interrupt request; 1: enable interrupt request.)
ZHIE/
OR combination of interrupt events
6-direction movement recognition
AND combination of interrupt events
6-direction position recognition
EMPTY
ZDOWNE
Doc ID 018845 Rev 1
ZLIE/
FSS4
YUPE
YHIE/
Interrupt mode
FSS3
YDOWNE
YLIE/
FSS2
XUPE
Registers description
XHIE/
FSS1
Table 43
Table 43
XDOWNE
FSS0
XLIE/
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