LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 34

• Manufacturer Part Number: LSM320DLTR
• Description: IC LINEAR
• Manufacturer: STMicroelectronics

Specifications of LSM320DLTR

• Lead Free Status / Rohs Status: Compliant

Registers description
7.9
7.10
7.11
7.12
34/53
Table 36.
OUT_X_L_A (28h), OUT_X_H_A (29h)
X-axis acceleration data. The value is expressed in 2’s complement.
OUT_Y_L_A (2Ah), OUT_Y_H_A (2Bh)
Y-axis acceleration data. The value is expressed in 2’s complement.
OUT_Z_L _A(2Ch), OUT_Z_H_A (2Dh)
Z-axis acceleration data. The value is expressed in 2’s complement.
FIFO_CTRL_REG_A (2Eh)
Table 37.
Table 38.
Table 39.
ZDA
YDA
FM1
FM1-FM0
TR
FTH4:0
0
0
1
1
FM1
Z axis new data available. Default value: 0
(0: a new data for the Z-axis is not yet available; 1: a new data for the Z-axis is available)
Y axis new data available. Default value: 0
(0: a new data for the Y-axis is not yet available; 1: a new data for the Y-axis is available)
FM0
STATUS_REG_A register description (continued)
FIFO_CTRL_REG_A register
FIFO_CTRL_REG_A register description
FIFO mode configuration
FIFO mode selection. Default value: 00 (see
Trigger selection. Default value: 0
0: trigger event linked to trigger signal on INT1
1: trigger event linked to trigger signal on INT2
Default value: 0
0
1
0
1
TR
Doc ID 018845 Rev 1
FM0
FTH4
Bypass mode
FIFO mode
Stream mode
Trigger mode
FTH3
Table 39
FTH2
)
FIFO mode
FTH1
LSM320DL
FTH0