LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 16

• Manufacturer Part Number: LSM320DLTR
• Description: IC LINEAR
• Manufacturer: STMicroelectronics

Specifications of LSM320DLTR

• Lead Free Status / Rohs Status: Compliant

Module specifications
2.4.2
Table 7.
1. Data based on standard I
2. Cb = total capacitance of one bus line, in pF.
Figure 4.
d. Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both ports.
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t
t
SCL
r(SDA)
SDA
f(SDA)
t
Symbol
t
t
t
w(SP:SR)
w(SCLH)
t
w(SCLL)
t
su(SDA)
t
f
h(SDA)
t
su(SR)
su(SP)
(SCL)
h(ST)
t
t
t
r(SCL)
f(SCL)
f(SDA)
I
I
Subject to general operating conditions for Vdd and Top.
I
2
t
2
2
h(ST)
C slave timing diagram
C slave timing values
C - inter IC control interface
SCL clock frequency
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
Repeated START condition
setup time
STOP condition setup time
Bus free time between STOP
and START condition
START
t
w(SCLL)
t
r(SDA)
2
Parameter
C protocol requirement, not tested in production.
t
w(SCLH)
t
su(SDA)
(d)
t
r(SCL)
Doc ID 018845 Rev 1
I
2
C standard mode
Min.
0,01
250
4.7
4.0
4.7
4.7
0
4
4
t
f(SCL)
t
h(SDA)
Max.
1000
3.45
100
300
(1)
20 + 0.1C
20 + 0.1C
Min.
100
1.3
0.6
0.6
0.6
0.6
1.3
I
0
0
2
C fast mode
t
su(SR)
b
b
(2)
(2)
t
su(SP)
t
w(SP:SR)
Max.
400
300
300
(1)
0.9
REPEATED
START
LSM320DL
STOP
AM09238V1
START
Unit
KHz
µs
ns
µs
ns
µs