LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 26

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LSM320DLTR

Manufacturer Part Number
LSM320DLTR
Description
IC LINEAR
Manufacturer
STMicroelectronics
Datasheet

Specifications of LSM320DLTR

Lead Free Status / Rohs Status
Compliant
Digital interfaces
5.2.1
5.2.2
26/53
SPI read
Figure 7.
The SPI Read command is performed with 16 clock pulses. Multiple byte read command is
performed adding blocks of 8 clock pulses at the previous one.
bit 0: READ bit. The value is 1.
bit 1: MS bit. When 0, do not increment address, when 1, increment address in multiple
reading.
bit 2-7: address AD(5:0). This is the address field of the indexed register.
bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).
bit 16-... : data DO(...-8). Further data in multiple byte reading.
Figure 8.
SPI write
Figure 9.
The SPI write command is performed with 16 clock pulses. Multiple byte write command is
performed adding blocks of 8 clock pulses at the previous one.
SDO
SPC
SDI
CS
SPC
SDI
CS
SDO
SPC
SPI read protocol
Multiple bytes SPI read protocol (2 bytes example)
SPI write protocol
RW
SDI
CS
MS
AD5 AD4 AD3 AD2 AD1 AD0
RW
RW
MS
AD5 AD4 AD3 AD2 AD1 AD0
MS
AD5 AD4 AD3 AD2 AD1 AD0
Doc ID 018845 Rev 1
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
DO15 DO14 DO13 DO12 DO11 DO10 DO9 DO8
LSM320DL

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