LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 38

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LSM320DLTR

Manufacturer Part Number
LSM320DLTR
Description
IC LINEAR
Manufacturer
STMicroelectronics
Datasheet

Specifications of LSM320DLTR

Lead Free Status / Rohs Status
Compliant
Registers description
7.20
7.21
7.22
38/53
Table 53.
CLICK_THS_A (3Ah)
Table 54.
Table 55.
TIME_LIMIT_A (3Bh)
Table 56.
Table 57.
TIME_LATENCY_A (3Ch)
Table 58.
IA
DCLICK
SCLICK
Sign
Z
Y
X
--
Ths6-Ths0
--
TLI7-TLI0
TLA7
Ths6
TLI6
TLA6
Interrupt active. Default value: 0
(0: no interrupt has been generated; 1: one or more interrupts have been generated)
Double CLICK-CLICK enable. Default value: 0 (0: double CLICK-CLICK detection dis-
able, 1: double CLICK-CLICK detection enable)
Single CLICK-CLICK enable. Default value: 0 (0: single CLICK-CLICK detection dis-
able, 1: single CLICK-CLICK detection enable)
CLICK-CLICK Sign. 0: positive detection, 1: negative detection
Z CLICK-CLICK detection. Default value: 0
(0: no interrupt, 1: Z high event has occurred)
Y CLICK-CLICK detection. Default value: 0
(0: no interrupt, 1: Y high event has occurred)
X CLICK-CLICK detection. Default value: 0
(0: no interrupt, 1: X high event has occurred)
CLICK_SRC_A description
CLICK_THS_A register
CLICK_SRC_A description
TIME_LIMIT_A register
TIME_LIMIT_A description
TIME_LATENCY_A register
CLICK-CLICK threshold. Default value: 000 0000
CLICK-CLICK time limit. Default value: 000 0000
Ths5
TLI5
TLA5
Doc ID 018845 Rev 1
Ths4
TLI4
TLA4
Ths3
TLI3
TLA3
Ths2
TLI2
TLA2
Ths1
TLI1
TLA1
LSM320DL
Ths0
TLI0
TLA0

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