LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 22

• Manufacturer Part Number: LSM320DLTR
• Description: IC LINEAR
• Manufacturer: STMicroelectronics

Specifications of LSM320DLTR

• Lead Free Status / Rohs Status: Compliant

Digital interfaces
5
5.1
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Digital interfaces
The registers embedded inside the LSM320DL may be accessed through both the I
SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
To select/exploit the I
Table 10.
I
The LSM320DL I
whose content can also be read back.
The relevant I
Table 11.
There are two signals associated with the I
data line (SDA). The latter is a bidirectional line used for sending and receiving the data
to/from the interface.
2
C serial interface
SDA/SDI_G
SDA/SDI_A
Transmitter
Pin name
Receiver
SDO_G
SDO_A
SCL_G
SCL_A
Master
CS_G
CS_A
Term
Slave
Serial interface pin description
Serial interface pin description
2
C terminology is given in the table below.
2
C is a bus slave. The I
Linear acceleration SPI enable
Linear acceleration I
Angular Rate SPI enable
Angular Rate I
I
SPI serial port clock (SPC)
I
SPI serial data input (SDI)
3-wire interface serial data output (SDO)
I
SPI serial data output (SDO)
The device which sends data to the bus
The device which receives data from the bus
The device which initiates a transfer, generates clock signals and terminates a
transfer
The device addressed by the master
2
2
2
2
C serial clock (SCL)
C serial data (SDA)
C less significant bit of the device address (SA0)
C interface, CS line must be tied high (i.e. connected to Vdd_IO).
Doc ID 018845 Rev 1
2
C/SPI mode selection (1: I
2
C/SPI mode selection (1: I
2
C is employed to write the data into the registers
2
C bus: the serial clock line (SCL) and the serial
Pin description
Description
2
C mode; 0: SPI enabled)
2
C mode; 0: SPI enabled)
LSM320DL
2
C and