LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 31

• Manufacturer Part Number: LSM320DLTR
• Description: IC LINEAR
• Manufacturer: STMicroelectronics

Specifications of LSM320DLTR

• Lead Free Status / Rohs Status: Compliant

LSM320DL
7.2
7.3
CTRL_REG2_A (21h)
Table 22.
Table 23.
Table 24.
CTRL_REG3_A (22h)
Table 25.
1. This bit must be set to ‘0’ for correct operation.
Table 26.
HPM1 -HPM0
HPCF2 -
HPCF1
FDS
HPCLICK
HPIS2
HPIS1
0
0
1
1
I1_CLICK
I1_AOI1
I1_CLICK
HPM1
HPM1
0
1
0
1
HPM0
I1_AOI1
CTRL_REG2_A register
CTRL_REG2_A description
High pass filter mode configuration
CTRL_REG3_A register
CTRL_REG3_A description
HPM0
High pass filter mode selection. Default value: 00
Refer to
High pass filter cut-off frequency selection
Filtered data selection. Default value: 0
(0: internal filter bypassed; 1: data from internal filter sent to output register and
FIFO)
High pass filter enabled for CLICK function.
(0: filter bypassed; 1: filter enabled)
High pass filter enabled for AOI function on interrupt 2,
(0: filter bypassed; 1: filter enabled)
High pass filter enabled for AOI function on interrupt 1,
(0: filter bypassed; 1: filter enabled)
Normal mode (reset reading HP_RESET_FILTER)
Reference signal for filtering
Normal mode
Autoreset on interrupt event
CLICK interrupt on INT1. Default value 0.
(0: disable; 1: enable)
AOI1 interrupt on INT1. Default value 0.
(0: disable; 1: enable)
Table 24
HPCF2
0
(1)
Doc ID 018845 Rev 1
I1_DRDY1
HPCF1
High pass filter mode
I1_DRDY2
FDS
HPCLICK
I1_WTM
Registers description
I1_OVERRUN
HPIS2
HPIS1
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