LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 45

• Manufacturer Part Number: LSM320DLTR
• Description: IC LINEAR
• Manufacturer: STMicroelectronics

Specifications of LSM320DLTR

• Lead Free Status / Rohs Status: Compliant

LSM320DL
7.32
7.33
7.34
7.35
Table 83.
OUT_X_L_G (28h), OUT_X_H_G (29h)
X-axis angular rate data. The value is expressed as 2’s complement.
OUT_Z_L_G (2Ch), OUT_Z_H_G (2Dh)
Z-axis angular rate data. The value is expressed as 2’s complement.
FIFO_CTRL_REG_G (2Eh)
Table 84.
Table 85.
Table 86.
FIFO_SRC_REG_G (2Fh)
Table 87.
ZXDA
ZDA
XDA
FM2
FM2-FM0
WTM4-WTM0
0
0
0
0
1
WTM
FM2
X, Z-axis new data available. Default value: 0
(0: a new set of data is not yet available; 1: a new set of data is available)
Z-axis new data available. Default value: 0
(0: a new data for the Z-axis is not yet available; 1: a new data for the Z-axis is available)
X-axis new data available. Default value: 0
(0: a new data for the X-axis is not yet available; 1: a new data for the X-axis is available)
OVRN
0
0
1
1
0
FM1
FM1
STATUS_REG_G description (continued)
REFERENCE_G register
REFERENCE_G register description
FIFO mode configuration
FIFO_SRC_G register
FIFO mode selection. Default value: 00 (see
FIFO threshold. Watermark level setting
0
1
0
1
0
FM0
FM0
EMPTY
FIFO mode
Bypass mode
FIFO mode
Stream mode
Stream-to-FIFO mode
Bypass-to-stream mode
Doc ID 018845 Rev 1
WTM4
FSS4
WTM3
FSS3
Table
WTM2
FSS2
86)
Registers description
WTM1
FSS1
WTM0
FSS0
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