PIC18F26K80-E/SP Microchip Technology Inc., PIC18F26K80-E/SP Datasheet - Page 572

• Manufacturer Part Number: PIC18F26K80-E/SP
• Description: 28 SPDIP .300IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F26K80-E/SP

• A/d Inputs: 8-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC18F66K80 FAMILY
FIGURE 31-5:
TABLE 31-9:
DS39977C-page 572
10
11
12
13
14
15
16
17
18
19
20
21
22†
23†
Note 1:
Param
No.
Note:
(Output)
I/O pin
I/O pin
(Input)
OSC1
CLKO
† These parameters are asynchronous events not related to any internal clock edges.
T
T
T
T
T
T
T
T
T
T
T
T
T
T
OS
OS
CK
CK
CK
CK
OS
OS
Symbol
IO
IO
IO
IO
INP
RBP
Measurements are taken in EC mode, where CLKO output is 4 x T
V2
V2
R
F
H2
R
F
L2
H2
H2
H2
H2
Refer to
CK
OS
IO
CK
IO
CK
IO
IO
V CLKO  to Port Out Valid
H Port In Valid before CLKO 
I
V OSC1  (Q1 cycle) to Port Out Valid
I
H Port Input Valid to OSC1 
H OSC1  to CLKO 
L OSC1  to CLKO 
CLKO AND I/O TIMING REQUIREMENTS
CLKO Rise Time
CLKO Fall Time
Port In Hold after CLKO 
OSC1  (Q2 cycle) to Port Input Invalid
(I/O in hold time)
(I/O in setup time)
Port Output Rise Time
Port Output Fall Time
INTx pin High or Low Time
RB<7:4> Change INTx High or Low
Time
Figure 31-3
CLKO AND I/O TIMING
Old Value
Q4
for load conditions.
Characteristic
10
13
17
14
20, 21
Q1
Preliminary
19
0.25 T
Min
100
T
20
—
—
—
—
—
—
—
—
CY
CY
18
0
0
+ 25
Q2
15
New Value
OSC
Typ
75
75
15
15
50
10
10
—
—
—
—
—
—
—
.
0.5 T
 2011 Microchip Technology Inc.
Max
200
200
150
CY
30
30
25
25
—
—
—
—
—
—
11
12
+ 20
16
Units Conditions
Q3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 1)
(Note 1)