PIC18F26K80-E/SP Microchip Technology Inc., PIC18F26K80-E/SP Datasheet - Page 13

• Manufacturer Part Number: PIC18F26K80-E/SP
• Description: 28 SPDIP .300IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F26K80-E/SP

• A/d Inputs: 8-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

1.0
This document contains device-specific information for
the following devices:
This family combines the traditional advantages of all
PIC18 microcontrollers – namely, high computational
performance and a rich feature set – with an extremely
competitive price point. These features make the
PIC18F66K80 family a logical choice for many
high-performance applications where price is a primary
consideration.
1.1
1.1.1
All of the devices in the PIC18F66K80 family incorpo-
rate a range of features that can significantly reduce
power consumption during operation. Key items include:
• Alternate Run Modes: By clocking the controller
• Multiple Idle Modes: The controller can also run
• On-the-Fly Mode Switching: The power-managed
• nanoWatt XLP: An extra low-power BOR and
1.1.2
All of the devices in the PIC18F66K80 family offer
different oscillator options, allowing users a range of
choices in developing application hardware. These
include:
• External Resistor/Capacitor (RC); RA6 available
• External Resistor/Capacitor with Clock Out
• Three External Clock modes:
 2011 Microchip Technology Inc.
• PIC18F25K80
• PIC18F26K80
• PIC18F45K80
• PIC18F46K80
• PIC18F65K80
• PIC18F66K80
from the Timer1 source or the Internal RC oscilla-
tor, power consumption during code execution
can be reduced.
with its CPU core disabled but the peripherals still
active. In these states, power consumption can be
reduced even further.
modes are invoked by user code during operation,
allowing the user to incorporate power-saving ideas
into their application’s software design.
low-power Watchdog timer
(RCIO)
- External Clock (EC); RA6 available
- External Clock with Clock Out (ECIO)
- External Crystal (XT, HS, LP)
DEVICE OVERVIEW
Core Features
nanoWatt TECHNOLOGY
OSCILLATOR OPTIONS AND
FEATURES
• PIC18LF25K80
• PIC18LF26K80
• PIC18LF45K80
• PIC18LF46K80
• PIC18LF65K80
• PIC18LF66K80
Preliminary
PIC18F66K80 FAMILY
• A Phase Lock Loop (PLL) frequency multiplier,
• An internal oscillator block that provides a 16 MHz
The internal oscillator block provides a stable reference
source that gives the family additional features for
robust operation:
• Fail-Safe Clock Monitor: This option constantly
• Two-Speed Start-up: This option allows the
1.1.3
The PIC18F66K80 family provides ample room for
application code, from 32 Kbytes to 64 Kbytes of code
space. The Flash cells for program memory are rated
to last up to 10,000 erase/write cycles. Data retention
without refresh is conservatively estimated to be
greater than 20 years.
The Flash program memory is readable and writable.
During normal operation, the PIC18F66K80 family also
provides plenty of room for dynamic application data
with up to 3.6 Kbytes of data RAM.
1.1.4
The PIC18F66K80 family implements the optional
extension to the PIC18 instruction set, adding eight
new instructions and an Indexed Addressing mode.
Enabled as a device configuration option, the extension
has been specifically designed to optimize re-entrant
application code originally developed in high-level
languages, such as ‘C’.
available to the external oscillator modes which
allows clock speeds of up to 64 MHz. PLL can
also be used with the internal oscillator.
clock (±2% accuracy) and an INTOSC source
(approximately 31 kHz, stable over temperature
and V
- Operates as HF-INTOSC or MF-INTOSC
- Frees the two oscillator pins for use as
monitors the main clock source against a reference
signal provided by the internal oscillator. If a clock
failure occurs, the controller is switched to the
internal oscillator, allowing for continued low-speed
operation or a safe application shutdown.
internal oscillator to serve as the clock source
from Power-on Reset, or wake-up from Sleep
mode, until the primary clock source is available.
when block is selected for 16 MHz or
500 kHz
additional general purpose I/O
DD
)
MEMORY OPTIONS
EXTENDED INSTRUCTION SET
DS39977C-page 13