PIC18F26K80-E/SP Microchip Technology Inc., PIC18F26K80-E/SP Datasheet - Page 377

• Manufacturer Part Number: PIC18F26K80-E/SP
• Description: 28 SPDIP .300IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F26K80-E/SP

• A/d Inputs: 8-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

24.0
The analog comparator module contains two compara-
tors that can be independently configured in a variety of
ways. The inputs can be selected from the analog
inputs and two internal voltage references. The digital
outputs are available at the pin level and can also be
read through the control register. Multiple output and
interrupt event generation are also available. A generic
single comparator from the module is shown in
Figure
Key features of the module includes:
• Independent comparator control
• Programmable input configuration
• Output to both pin and register levels
• Programmable output polarity
• Independent interrupt generation for each
FIGURE 24-1:
 2011 Microchip Technology Inc.
comparator with configurable interrupt-on-change
C2INB/C2IND
Note 1: Comparator 1 uses C2INB as an input to the inverted terminal.
CCH<1:0>
24-1.
COMPARATOR MODULE
CxINC
CV
CxINB
CxINA
V
Comparator 2 uses C1INB as an input to the inverted terminal.
REF
BG
CREF
(1)
0
1
COMPARATOR SIMPLIFIED BLOCK DIAGRAM
0
1
2
3
V
V
IN
IN
-
+
CON
Cx
Preliminary
PIC18F66K80 FAMILY
24.1
The CMxCON registers (CM1CON and CM2CON)
select the input and output configuration for each com-
parator, as well as the settings for interrupt generation
(see
The CMSTAT register
put results of the comparators. The bits in this register
are read-only.
Register
EVPOL<1:0>
Registers
Interrupt
Polarity
CPOL
Logic
Logic
24-1).
(Register
COE
24-2) provides the out-
DS39977C-page 377
CxOUT
CMPxIF
CMPxOUT
(CMSTAT<7:6>)