PIC18F26K80-E/SP Microchip Technology Inc., PIC18F26K80-E/SP Datasheet - Page 229

• Manufacturer Part Number: PIC18F26K80-E/SP
• Description: 28 SPDIP .300IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F26K80-E/SP

• A/d Inputs: 8-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

16.0
The Timer3 timer/counter modules incorporate these
features:
• Software selectable operation as a 16-bit timer or
• Readable and writable eight-bit registers (TMR3H
• Selectable clock source (internal or external) with
• Interrupt-on-overflow
• Module Reset on ECCP Special Event Trigger
REGISTER 16-1:
 2011 Microchip Technology Inc.
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3
bit 2
bit 1
bit 0
TMR3CS1
counter
and TMR3L)
device clock or SOSC oscillator internal options
R/W-0
TIMER3 MODULE
The F
TMR3CS<1:0>: Timer3 Clock Source Select bits
10 = Timer3 clock source is either from pin or oscillator, depending on the SOSCEN bit:
SOSCEN = 0 :
External clock is from T3CKI pin (on the rising edge).
SOSCEN = 1 :
Depending on the SOSCSEL Configuration bit, the clock source is either a crystal oscillator on
SOSCI/SOSCO or an internal digital clock from the SCLKI pin.
01 = Timerx clock source is system clock (F
00 = Timerx clock source is instruction clock (F
T3CKPS<1:0> : Timer3 Input Clock Prescale Select bits
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
SOSCEN : SOSC Oscillator Enable bit
1 = SOSC enabled and available for Timer3
0 = SOSC disabled and available for Timer3
T3SYNC: Timer3 External Clock Input Synchronization Control bit
(Not usable if the device clock comes from Timer1/Timer3.)
When TMR3CS<1:0> = 10 :
1 = Do not synchronize external clock input
0 = Synchronize external clock input
When TMR3CS<1:0> = 0x :
This bit is ignored; Timer3 uses the internal clock.
RD16: 16-Bit Read/Write Mode Enable bit
1 = Enables register read/write of Timer3 in one 16-bit operation
0 = Enables register read/write of Timer3 in two eight-bit operations
TMR3ON: Timer3 On bit
1 = Enables Timer3
0 = Stops Timer3
TMR3CS0
OSC
R/W-0
clock source should not be selected if the timer will be used with the ECCP capture/compare features.
T3CON: TIMER3 CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
T3CKPS1
R/W-0
T3CKPS0
R/W-0
Preliminary
OSC
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
SOSCEN
OSC
)
R/W-0
(1)
A simplified block diagram of the Timer3 module is
shown in
The Timer3 module is controlled through the T3CON
register
options for the ECCP modules. (For more information,
see
Resources”
The F
ECCP capture/compare features. If the timer will be
used with the capture or compare features, always
select one of the other timer clocking options.
/4)
Section 20.1.1 “ECCP Module and Timer
OSC
(Register
Figure
clock source should not be used with the
.)
T3SYNC
R/W-0
16-1.
16-1). It also selects the clock source
x = Bit is unknown
R/W-0
RD16
DS39977C-page 229
TMR3ON
R/W-0
bit 0