MC68EC000EI12 Freescale Semiconductor, MC68EC000EI12 Datasheet - Page 91

• Manufacturer Part Number: MC68EC000EI12
• Description: IC MPU 32BIT 12MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: 68K - M680X0r

Specifications of MC68EC000EI12

• Processor Type: M680x0 32-Bit
• Speed: 12MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 12MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 12MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Instruction Set Summary
3.3 INSTRUCTION EXAMPLES
The following paragraphs provide examples of how to use selected instructions.
3.3.1 Using the Cas and Cas2 Instructions
The CAS instruction compares the value in a memory location with the value in a data
register, and copies a second data register into the memory location if the compared values
are equal. This provides a means of updating system counters, history information, and
globally shared pointers. The instruction uses an indivisible read-modify- write cycle. After
CAS reads the memory location, no other instruction can change that location before CAS
has written the new value. This provides security in single-processor systems, in
multitasking environments, and in multiprocessor environments. In a single-processor
system, the operation is protected from instructions of an interrupt routine. In a multitasking
environment, no other task can interfere with writing the new value of a system variable. In
a multiprocessor environment, the other processors must wait until the CAS instruction
completes before accessing a global pointer.
3.3.2 Using the Moves Instruction
This instruction moves the byte, word, or long-word operand from the specified general
register to a location within the address space specified by the destination function code
(DFC) register. It also moves the byte, word, or long-word operand from a location within the
address space specified by the source function code (SFC) register to the specified general
register.
3.3.3 Nested Subroutine Calls
The LINK instruction pushes an address onto the stack, saves the stack address at which
the address is stored, and reserves an area of the stack. Using this instruction in a series of
subroutine calls results in a linked list of stack frames.
The UNLK instruction removes a stack frame from the end of the list by loading an address
into the stack pointer and pulling the value at that address from the stack. When the operand
of the instruction is the address of the link address at the bottom of a stack frame, the effect
is to remove the stack frame from the stack and from the linked list.
3.3.4 Bit Field Instructions
One of the data types provided by the MC68030 is the bit field, consisting of as many as 32
consecutive bits. An offset from an effective address and a width value defines a bit field.
The offset is a value in the range of – 231 through 231 – 1 from the most significant bit (bit
7) at the effective address. The width is a positive number, 1 through 32. The most significant
bit of a bit field is bit 0. The bits number in a direction opposite to the bits of an integer.
The instruction set includes eight instructions that have bit field operands. The insert bit field
(BFINS) instruction inserts a bit field stored in a register into a bit field. The extract bit field
signed (BFEXTS) instruction loads a bit field into the least significant bits of a register and
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M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
MOTOROLA