MC68EC000EI12 Freescale Semiconductor, MC68EC000EI12 Datasheet - Page 327

• Manufacturer Part Number: MC68EC000EI12
• Description: IC MPU 32BIT 12MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: 68K - M680X0r

Specifications of MC68EC000EI12

• Processor Type: M680x0 32-Bit
• Speed: 12MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 12MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 12MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

FCMP
Operation:
Assembler
Syntax:
Attributes:
Description: Converts the source operand to extended precision (if necessary) and
Operation Table:
MOTOROLA
NOTE: If the source operand is a NAN, refer to 1.6.5 Not-A-Numbers for more information.
subtracts the operand from the destination floating- point data register. The result of the
subtraction is not retained, but it is used to set the floating-point condition codes as
described in 3.6.2 Conditional Testing.
describing most of the floating-point instructions. For each combination of input
operand types, the condition code bits that may be set are indicated. If the name of a
condition code bit is given and is not enclosed in brackets, then it is always set. If the
name of a condition code bit is enclosed in brackets, then that bit is either set or
cleared, as appropriate. If the name of a condition code bit is not given, then that bit is
always cleared by the operation. The infinity bit is always cleared by the FCMP
instruction since it is not used by any of the conditional predicate equations. Note that
the NAN bit is not shown since NANs are always handled in the same manner (as
described in 1.6.5 Not-A-Numbers).
DESTINATION
In Range
Infinity
Zero
–
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
FPn – Source
FCMP. < fmt > < ea > ,FPn
FCMP.X FPm,FPn
Format = (Byte, Word, Long, Single, Double, Extended, Packed)
The entries in this operation table differ from those of the tables
+
+
–
+
–
+
{NZ}
N
N
N
none
N
Floating-Point Compare
In Range
(MC6888X, MC68040)
none
none
none
none
{NZ}
N
– +
none
N
Z
NZ
none
N
SOURCE
Zero
none
none
NZ
N
N
– +
Z
N
N
N
N
Z
N
Floating Point Instructions
Infinity
FCMP
none
none
none
none
none
NZ
–
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