MC68EC000EI12 Freescale Semiconductor, MC68EC000EI12 Datasheet - Page 43

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MC68EC000EI12

Manufacturer Part Number
MC68EC000EI12
Description
IC MPU 32BIT 12MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Series
68K - M680X0r
Datasheets

Specifications of MC68EC000EI12

Processor Type
M680x0 32-Bit
Speed
12MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Core Size
32 Bit
Cpu Speed
12MHz
Digital Ic Case Style
PLCC
No. Of Pins
68
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
0°C To +70°C
Filter Terminals
SMD
Rohs Compliant
Yes
Clock Frequency
12MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EC000EI12
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC68EC000EI12
Quantity:
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Part Number:
MC68EC000EI12R2
Manufacturer:
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Addressing Capabilities
An instruction specifies the function to be performed with an operation code and defines the
location of every operand. Instructions specify an operand location by register specification,
the instruction’s register field holds the register’s number; by effective address, the
instruction’s effective address field contains addressing mode information; or by implicit
reference, the definition of the instruction implies the use of specific registers.
The single effective address operation word format is the basic instruction word (see Figure
2-2). The encoding of the mode field selects the addressing mode. The register field
contains the general register number or a value that selects the addressing mode when the
mode field contains opcode 111. Some indexed or indirect addressing modes use a
combination of the simple effective address operation word followed by a brief extension
word. Other indexed or indirect addressing modes consist of the simple effective address
operation word and a full extension word. The longest instruction is a MOVE instruction with
a full extension word for both the source and destination effective addresses and eight other
extension words. It also contains 32-bit base displacements and 32-bit outer displacements
for both source and destination addresses. Figure 2-2 illustrates the three formats used in
an instruction word; Table 2-1 lists the field definitions for these three formats.
2-2
D/A
D/A
15
15
15
X
14
14
14
X
REGISTER
REGISTER
13
13
13
X
Figure 2-2. Instruction Word Specification Formats
SINGLE EFFECTIVE ADDRESS OPERATION WORD FORMAT
12
12
12
X
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
W/L
W/L
11
11
11
X
BRIEF EXTENSION WORD FORMAT
OUTER DISPLACEMENT (0, 1, OR 2 WORDS)
FULL EXTENSION WORD FORMAT
BASE DISPLACEMENT (0, 1, OR 2 WORDS)
10
10
10
X
SCALE
SCALE
X
9
9
9
8
X
8
0
8
1
BS
X
7
7
7
IS
X
6
6
6
5
5
5
BD SIZE
DISPLACEMENT
MODE
4
4
4
EFFECTIVE ADDRESS
3
3
3
0
2
2
2
REGISTER
MOTOROLA
I/IS
1
1
1
0
0
0

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