MC68EC000EI12 Freescale Semiconductor, MC68EC000EI12 Datasheet - Page 462

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MC68EC000EI12

Manufacturer Part Number
MC68EC000EI12
Description
IC MPU 32BIT 12MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Series
68K - M680X0r
Datasheets

Specifications of MC68EC000EI12

Processor Type
M680x0 32-Bit
Speed
12MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Core Size
32 Bit
Cpu Speed
12MHz
Digital Ic Case Style
PLCC
No. Of Pins
68
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
0°C To +70°C
Filter Terminals
SMD
Rohs Compliant
Yes
Clock Frequency
12MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EC000EI12
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC68EC000EI12
Quantity:
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Part Number:
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Supervisor (Privileged) Instructions
CPUSH
Operation:
Assembler
Syntax:
Attributes:
Description: Pushes and then invalidates selected cache lines. The DATA cache,
Condition Codes:
Instruction Format:
6-8
15
1
Specific cache lines can be selected in three ways:
Not affected.
instruction cache, both caches, or neither cache can be specified. When the data cache
is specified, the selected data cache lines are first pushed to memory (if they contain
dirty DATA) and then invalidated. Selected instruction cache lines are invalidated.
14
1
1. CPUSHL pushes and invalidates the cache line (if any) matching the physical
2. CPUSHP pushes and invalidates the cache lines (if any) matching the physical
3. CPUSHA pushes and invalidates all cache entries.
address in the specified address register.
memory page in the specified address register. For example, if 4K-byte page
sizes are selected and An contains $12345000, all cache lines matching page
$12345000 are selected.
13
1
12
1
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
If Supervisor State
CPUSHL < caches > ,(An)
CPUSHP < caches > ,(An)
CPUSHA < caches >
Where < caches > specifies the instruction cache, data cache,
both caches, or neither cache.
Unsized
Then If Data Cache
ELSE TRAP
Push and Invalidate Cache Lines
11
0
Then Push Selected Dirty Data Cache Lines
Invalidate Selected Cache Lines
10
1
(MC68040, MC68LC040)
9
0
8
0
7
CACHE
6
5
1
4
SCOPE
3
CPUSH
2
REGISTER
MOTOROLA
1
0

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