MC68EC000EI12 Freescale Semiconductor, MC68EC000EI12 Datasheet - Page 325

• Manufacturer Part Number: MC68EC000EI12
• Description: IC MPU 32BIT 12MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: 68K - M680X0r

Specifications of MC68EC000EI12

• Processor Type: M680x0 32-Bit
• Speed: 12MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 12MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 12MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

FBcc
Operation:
Assembler:
Syntax:
Attributes:
Description: If the specified floating-point condition is met, program execution continues at
Floating-Point Status Register:
MOTOROLA
the location (PC) + displacement. The displacement is a twos-complement integer that
counts the relative distance in bytes. The value of the program counter used to
calculate the destination address is the address of the branch instruction plus two. If
the displacement size is word, then a 16- bit displacement is stored in the word
immediately following the instruction operation word. If the displacement size is long
word, then a 32-bit displacement is stored in the two words immediately following the
instruction operation word. The conditional specifier cc selects any one of the 32
floating- point conditional tests as described in 3.6.2 Conditional Testing.
Condition Codes:
Quotient Byte:
Exception Byte:
Accrued Exception Byte:
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
If Condition True
FBcc. < size > , < label >
Size = (Word, Long)
Floating-Point Branch Conditionally
Then PC + d
Not affected.
Not affected.
BSUN
SNAN
OPERR
OVF
UNFL
DZ
INEX2
INEX1
The IOP bit is set if the BSUN bit is set in the exception
byte. No other bit is affected.
(MC6888X, MC68040)
n
PC
Set if the NAN condition code is set and the
condition selected is an IEEE nonaware test.
Not Affected.
Not Affected.
Not Affected.
Not Affected.
Not Affected.
Not Affected.
Not Affected.
Floating Point Instructions
FBcc
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