MC68EC000EI12 Freescale Semiconductor, MC68EC000EI12 Datasheet - Page 388

• Manufacturer Part Number: MC68EC000EI12
• Description: IC MPU 32BIT 12MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: 68K - M680X0r

Specifications of MC68EC000EI12

• Processor Type: M680x0 32-Bit
• Speed: 12MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 12MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 12MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Floating Point Instructions
FMOVEM
Floating-Point Status Register: Not Affected. Note that the FMOVEM instruction provides
Instruction Format:
5-86
15
1
1
the only mechanism for moving a floating- point data item between the floating-point
unit and memory without performing any data conversions or affecting the condition
code and exception status bits.
If the effective address is the predecrement mode, only a register- to-memory opera-
tion is allowed. The registers are stored starting at the address contained in the
address register and down through lower addresses. Before each register is stored, the
address register is decremented by 12 (the size of an extended-precision number in
memory) and the floating-point data register is then stored at the resultant address.
When the operation is complete, the address register points to the image of the last
floating- point data register stored. The order of the transfer is from FP7 – FP0.
If the effective address is the postincrement mode, only a memory- to-register opera-
tion is allowed. The registers are loaded starting at the specified address and up
through higher addresses. After each register is stored, the address register is incre-
mented by 12 (the size of an extended-precision number in memory). When the oper-
ation is complete, the address register points to the byte immediately following the
image of the last floating-point data register loaded. The order of the transfer is the
same as for the control addressing modes: FP0 – FP7.
14
1
1
13
dr
1
12
1
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
MODE
11
COPROCESSOR
Move Multiple Floating-Point
10
ID
0
(MC6888X, MC68040)
Data Registers
9
0
8
0
0
7
0
6
0
5
REGISTER LIST
MODE
4
EFFECTIVE ADDRESS
3
FMOVEM
2
REGISTER
MOTOROLA
1
0