Z85C3008PSG Zilog, Z85C3008PSG Datasheet - Page 73

IC 8MHZ Z8500 CMOS SCC 40-DIP

Z85C3008PSG

Manufacturer Part Number
Z85C3008PSG
Description
IC 8MHZ Z8500 CMOS SCC 40-DIP
Manufacturer
Zilog
Series
SCCr
Datasheets

Specifications of Z85C3008PSG

Processor Type
Z80
Features
Error Detection and Multiprotocol Support
Speed
8MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
Through Hole
Cpu Speed
8MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
85
Rohs Compliant
Yes
Clock Frequency
8MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3930
Q2456016A
Z85C3008PSG

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SCC™/ESCC™ User’s Manual
SCC/ESCC Ancillary Support Circuitry
3.5 CLOCK SELECTION (Continued)
2. The x1 mode in Asynchronous mode is a combination
3-12
of both synchronous and asynchronous transmission.
The data is clocked by a common timing base, but
characters are still framed with Start and Stop bits.
Because the receiver waits for one clock period after
Generator Out
Rx DPLL Out
Tx DPLL Out
Baud Rate
/SYNC
/RTxC
/TRxC
PCLK
Echo
OSC
Figure 3-10. Clock Multiplexer
Echo
OSC
detecting the first High-to-Low transition before
beginning to assemble characters, the data and clock
is synchronized externally. The x1 mode is the only
mode in which a data encoding method other than
NRZ is used.
BRG
DPLL
TX
RX
Baud Rate
Generator
Receiver
Transmitter
DPLL
UM010901-0601

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