Z85C3008PSG Zilog, Z85C3008PSG Datasheet - Page 205

• Manufacturer Part Number: Z85C3008PSG
• Description: IC 8MHZ Z8500 CMOS SCC 40-DIP
• Manufacturer: Zilog
• Series: SCCr

Specifications of Z85C3008PSG

• Processor Type: Z80
• Features: Error Detection and Multiprotocol Support
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: Through Hole
• Cpu Speed: 8MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 85
• Rohs Compliant: Yes
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3930; Q2456016A; Z85C3008PSG

Application Note
The Zilog Datacom Family with the 80186 CPU
SERIAL INTERFACING (Continued)
Note:
[3] Various conventions have been used to combine synchronous clock inputs and modem control inputs on Apple Macintosh connectors
similar to J4, as described in a later section.
Comparison of the two preceding charts leads to several
conclusions:
Finally, an unpopulated 4-pin oscillator socket is included
on the board with its output connected to a single
jumper/wire-wrap pin. This socket can be populated with a
user-supplied oscillator and connected to various clock
pin(s) among J5-J15.
6-70
Pin #
7
8
9
10
11
12
13
14
15
16
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
Pins 1-5 can always be jumpered straight across from a
J5-J10 connector block to a J13-J15 connector block.
In a synchronous environment, the Transmit clock can
be either driven or received and the Receive clock can
be received from the DTE connector or sent on the DCE
connector.
J13-J14
DTE signal
/DCD
GND
/RxC
/TxCO
/TxCI
/RI
Table 10. Pin Assignments of Line Driver/Receiver Connectors
Table 11. Pin Assignments of Controller Port Connectors
J13-J14
DCE signal
/DCD
GND
/RxC
/TxCI
/TxCO
/RI
J11: IUSC Signal
PORT1 (Clock 1 In)
PORT4 (Xmit TSA Gate Out)
(N/C)
PORT0 (Clock 0 In)
(N/C)
PORT3 (Rcv TSA Gate Out)
(N/C)
PORT5 (Rcv Sync Out)
PORT2
GND
PORT6 (Rcv Sync In)
PORT7 (Xmit Complete Out)
J15
DTE signal
/DDC
GND
/RxC
/TxCO
/TxCI
The 10-pin J11 and J12 jumper blocks provide for
connections to the Port pins of the IUSC and (M)USC,
respectively. As with J5-J10, these connections may be to
the customer’s off-board custom circuits and/or to certain
pins in the J13-J15 blocks. The following pin assignment is
determined so that if a 2-channel USC is plugged into the
(M)USC socket, J12 has the same pin-out for the USC’s B
channel as do J5-J10 for other channels.
J15
DCE signal
/DCD
GND
/RxC
/TxCI
/TxCO
J12: (M)USC Signal
PORT1
PORT4 (Xmit TSA Gate Out)
(N/C)
PORT0
(N/C)
PORT3 (Rcv TSA Gate Out)
(SYSCLK)
PORT5 (Rcv Sync Out)
PORT2
GND
PORT6 (Rcv Sync In)
PORT7 (Xmit Complete Out)
Direction/where used
Output to J1B, J2B, J3B
Input from J1A, J2A, J3A, J4
Output to J1B, J2B, J3B
Input from J1A, J2A, J3A
Output to J1-3
Input from J1-3 [3]
Output to J1B, J2B
Input from J1A, J2A
UM010901-0601