TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 93

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

9 3 o f 2 0 2
TimingMode
(Address 0x3A60)
LineTimingChannel
(Address 0x3A62)
TxRefSelect
(Address 0x3A64)
RxRefSelect
(Address 0x3A66)
TxPLL_Cap_Enable
(Address 0x3A68)
RxPLL_Cap_Enable
(Address 0x3A6A)
TxRefFreq
(Address 0x3A6C)
RxRefFreq
(Address 0x3A6E)
TxPLL_PowerDown
(Address 0x3A70)
RxPLL_PowerDown
(Address 0x3A72)
LineRate
(Address 0x3A52)
OC3NotOC12
(Address 0x3A5A)
Register
•
•
•
•
•
Write 0x0008 to IndirectAccessMode (Address 0x3A26), followed by writing 0x5000 to
IndiretAccessData (Address 0x3A5E)
Configure System Loopback (Address 0x3A22) or Facility Loopback (Address 0x3A24) if
desirable
Configure the CDRTune and PLLTune parameters (Addresses 0x3A74-0x3A7C and
0x3A7E)
Refer to the Memory Map section for recommended values.
Configure the PLL’s for External or Line Timing as follows:
Write 0x00 to TxRefClock2 PadPowerDown register (Address 0x3A34) if REFTXCLK2
is used as reference clock
Select Tx Reference Clock
Select Rx Reference Clock
Enable/Disable External Capacitor for Tx
PLL
Enable/Disable External Capacitor for Rx
PLL
Select Tx PLL Reference Clock Frequency
Select Rx PLL Reference Clock Frequency Select Rx PLL Reference Clock Fre-
STM-1/OC-3 Mode
0x0F
External Timing
N/A
N/A
0x0
0x0
0x0
- Operation -
STM-4/OC-12 Mode STM-1/OC-3
0x0E
Select timing mode channel
Select Rx Reference Clock
Enable/Disable External Capacitor for
Tx PLL
Enable/Disable External Capacitor for
Rx PLL
quency
Select Line Rate of Reference Channel
Mode
0x0F
PRELIMINARY TXC-06312B-MB, Ed. 2
Line Timing
PHAST-12N Device
0x1
N/A
N/A
0x0
0x0
STM-4/OC-12
Mode
DATA SHEET
0x0E
TXC-06312B
June 2005