TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 34

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PRELIMINARY TXC-06312B-MB, Ed. 2
June 2005
PHAST-12N Device
DATA SHEET
TXC-06312B
TOHTXCLK
TOHTXALE
TOHTXADDR
TOHTXDLE
TOHTXDATA
POHRXCLK
POHRXALE
POHRXADDR
POHRXDLE
POHRXDATA
Symbol
Symbol
TRANSMIT TOH BYTE INTERFACE
RECEIVE HIGH ORDER POH BYTE INTERFACE
Lead No.
Lead No.
W22
V22
U21
U20
T19
AA21
AA22
W20
Y21
V19
I/O/P
O
O
O
O
O
I/O/P
O
O
O
O
I
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
Type
8mA
8mA
8mA
8mA
8mA
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVTTL
16mA
Type
8mA
8mA
8mA
-
Lead Descriptions
Receive HO POH Port Clock: The POHRXALE, POHRX-
DLE, POHRXADDR and POHRXDATA signals are clocked
out on the falling edges of this clock.
Its frequency is 77.76 MHz.
Receive HO POH Port Address Latch Enable: An active
high, 8 POHRXCLK clock-cycle wide pulse indicating that a
valid address is present on POHRXADDR.
Receive HO POH Port Address: The 8 consecutive states
clocked out while POHRXALE is high form the address of the
subsequent High Order POH byte sent on the POHRXDATA
lead.
Receive HO POH Port Data Latch Enable: An active high, 8
POHRXCLK clock-cycle wide pulse indicating that valid data
is present on POHRXDATA.
Receive HO POH Port Data: The 8 consecutive states
clocked out while POHRXDLE is high form the value of the
High Order POH byte addressed by POHRXADDR.
Transmit TOH Port Clock: The TOHTXALE, TOHTXDLE
and TOHTXADDR signals are clocked out on the falling
edges of this clock.
TOHTXDATA is clocked in on the rising edge of this clock.
Its frequency is 77.76 MHz.
Transmit TOH Port Address Latch Enable: An active
high, 10 TOHTXCLK clock-cycle wide pulse indicating
that a valid address is present on TOHTXADDR.
Transmit TOH Port Address: The 10 consecutive states
clocked out while TOHTXALE is high form the address of
the subsequent TOH byte requested on the TOHTXDATA
lead.
Transmit TOH Port Data Latch Enable: An active high, 8
TOHTXCLK clock-cycle wide pulse indicating that valid
data is present on TOHTXDATA.
Transmit TOH Port Data: The value of the TOH byte
requested by TOHTXADDR is clocked in as the 8 consec-
utive states while TOHTXDLE is high.
When the Transmit TOH Byte Interface is not used, this
lead must be tied to VSS.
-
Name/Function
Name/Function
3 4 o f 2 0 2